Communications and radar using a short pulse signal are developed as one of UWB (Ultra Wide Band) technologies. To make a short pulse signal having only a component of any desired frequency band, there are a method of limiting the frequency band of a pulse signal through a filter and extracting only a specific frequency component, a method of intermittently operating an oscillator by a pulsed control signal, and a method of inputting a pulsed control signal to a mixer and curtaining a carrier signal, thereby generating a short pulse signal.
The performance required for the short pulse generation circuits includes low power consumption operation and a high On/Off ratio. The On/Off ratio refers to the mark-space ratio in amplitude modulation. The low power consumption operation becomes important performance whenever the circuit is installed in any machine. Thus, a high On/Off ratio is important performance for improving the communication quality in communications using a short pulse signal.
FIG. 28 shows the block configuration of a related art relating to a short pulse generation circuit using a mixer. FIG. 29 is a timing chart of signal waveforms in FIG. 28. The related art will be discussed with FIGS. 28 and 29.
A signal 2701 output from an oscillator 2601 is input to a mixer 2603. On the other hand, a control signal 2702 output from a control signal generation circuit 2602 is also input to the mixer. The signal 2701 is curtained by the control signal 2702 and is output as a short pulse signal 2703 from the mixer 2603. This circuit configuration is very simple and operates with low power consumption, but involves a problem of a low On/Off ratio because the signal from the oscillator 2601 leaks at the Off period.
As means for solving this problem, a configuration using a harmonic mixer 2802 as shown in FIG. 30 is proposed. The harmonic mixer is a mixer for outputting a signal having a frequency twice that of an input signal. FIG. 31 is a timing chart of signal waveforms in FIG. 30. The related art will be discussed with FIGS. 30 and 31.
A signal 2901 output from an oscillator 2801 is a signal having a half frequency component f0/2 of any desired frequency f0. The signal 2901 is input to the harmonic mixer 2802. On the other hand, a control signal 2902 output from a control signal generation circuit 2602 is also input to the harmonic mixer 2802.
The signal 2901 is curtained by the control signal 2902 and becomes a signal 2903 with the frequency at the On period being f0. The frequency of the signal 2903 at the Off period is f0/2 and the signal can be removed through a filter 2803 provided at the following stage of the harmonic mixer 2802, so that a short pulse signal having a higher On/Off ratio than that in the circuit configuration in FIG. 28 can be generated (refer to Non-patent document 1).
However, the circuit configuration of the related art described above involves a problem of the On/Off ratio depending on an APDP (Anti-Parallel Diode Pair) forming the harmonic mixer 2802 and being about 40 dB.
As means for solving this problem, a configuration wherein an intermittent amplifier is provided at the following stage of the harmonic mixer 2802 as shown in FIG. 32 is proposed. The intermittent amplifier is a circuit for controlling an amplification circuit by a control signal and intermittently operating the circuit. FIG. 33 is a timing chart of signal waveforms in FIG. 32. The related art will be discussed with FIGS. 32 and 33.
The operation from output of a signal 3101 from an oscillator 2801 to output of a signal 3103 from a harmonic mixer 2802 has been described above and therefore will not be discussed again.
The signal 3103 output from the harmonic mixer 2802 is input to an intermittent amplifier 3002. On the other hand, a control signal 3104 output from a control signal generation circuit 3001 is also input to the intermittent amplifier 3002, which then performs intermittent amplification operation.
If the timing of performing the intermittent amplification operation is when a short pulse signal is On in the signal 3103, the amplification at the On period is increased and the amplification at the Off period decreases because of isolation of the amplification circuit. Thus, the circuit configuration can be used to realize an On/Off ratio of about 60 dB (refer to Non-patent document 2).
However, the circuit configuration of the related art described above uses the amplification circuit to realize the On/Off ratio of about 60 dB and thus has a problem of an increase in power consumption. It also has a problem of circuit upsizing.
Aside from the circuit configuration using the harmonic mixer described above, a circuit configuration for improving the On/Off ratio by using a mixer and a frequency multiplier is also proposed. FIG. 34 shows the circuit configuration. FIG. 35 is a timing chart of signal waveforms in FIG. 34. The related art will be discussed with FIGS. 34 and 35.
A signal 3301 is output from an oscillator 2801 and is input to a modulation circuit 3201 made up of a mixer, etc. On the other hand, a control signal 3302 is output from a control signal generation circuit 2602 and is input to the modulation circuit 3201. The signal 3301 is curtained by the control signal 3302 and becomes a signal 3303. The signal 3303 is input to a frequency multiplier 3202 and becomes a signal 3304.
The conversion gain of the frequency multiplier changes with the level of an input signal; generally the higher the input signal level, the higher the conversion gain. Thus, if a short pulse signal having an amplitude difference like the signal 3303 is input, the conversion gain is high at the On period when the amplitude is high and the conversion gain becomes low at the Off period when the amplitude is low.
Thus, when the signal 3303 is input to the frequency multiplier and a frequency component is multiplied, the difference between the amplitude level at the On period and that at the Off period increases and the signal 3304 is generated. The main component of the signal at the Off period of the signal 3304 is a frequency component of a half the frequency of an output signal and thus is removed through a filter 3203 provided at the following stage, whereby an On/Off ratio of about 60 dB can be realized (refer to Patent document 1).
However, the circuit configuration of the related art described above involves a problem of distortion of the output signal waveform. The signal 3303 input to the frequency multiplier 3202 is a short pulse signal shaped like a burst and has a spread in a spectrum on the frequency axis.
On the other hand, the frequency multiplier is a circuit for distorting a signal to generate a double wave and thus when a signal having a spread in a spectrum is input to the frequency multiplier, intermodulation occurs and the output waveform is distorted. Since the spectrum further spreads because of the waveform distortion, high specification is required for the performance of the filter provided at the following stage and at the same time, it is difficult to control the waveform distortion; this is a problem.
Non-patent document 1: R. F. Forsythe, “A coherent solid sate, 225 GHz receiver,” Microwave journal, pp. 64-71 1982
Non-patent document 2: IEICE, ED2004-204, MW2004-211 (2005-01)
Patent document 1: JP2004-354288A